Course Overview
This 2-day course provides a comprehensive overview of Flip Chip Packaging technology. Students will learn about the history, advantages, types, bonding mechanisms, substrates, design rules, manufacturing processes, and reliability considerations of flip chip packaging.
Course Topics
History and Types of Flip Chip
- History of Flip Chip
- Advantages of Flip Chip and comparison to alternative packaging options
- Types of Flip Chip and their advantages & disadvantages:
- Solder bump
- Copper pillar bump
- Gold bump
- Stud bump & other
Bonding Mechanisms and Substrates
- Bonding mechanisms and resulting joints:
- Solder reflow (mass)
- Solder reflow (thermode)
- Thermocompression
- TCNCP (Thermo-Compression, Non-Conductive Paste)
- Conductive paste
- Bond hierarchy in multi-chip packages
- Substrates for Flip Chip bonding:
- Ceramic
- Laminate
- Leadframe
- Bond pad designs (SMD, NSMD, Plated up)
Design Rules and Manufacturing
- Design rules for Flip Chip (Chip, I/O cell placement, Substrate/package, Cost implications, DFT, DFR)
- Manufacturing – process, materials, equipment:
- Wafer prep including RDL
- Bumping process including UBM
- Evaporation, sputtering, plating, photolithography
- Flip Chip assembly & process flow
- Underfill – including capillary, no-flow and other
- Equipment and OSAT Flip Chip options
- Flip Chip Quality Control
Reliability and Performance
- Flip Chip Reliability (TCE mismatch, DNP, Role of underfill, Reliability tests, Electromigration)
- Flip Chip thermal enhancement and modeling
- Flip Chip electrical performance versus wirebonding
- High speed issues and modeling
Applications and Comparisons
- Flip Chip Application Examples (High End/High Speed, High Leadcount, Mobile, Analog/RF, Flip Chip on chip)
- Flip Chip-Like Applications (Stacked chip TSV microbumps, TAB, Display drivers, 2.5D/interposers/EMIB)
- Flip Chip versus other packaging options (Wirebond leadframe, Wirebond laminate, FOWLP/FOPLP, SiP)
Who Should Attend
Anyone interested in flip chip technology, including packaging engineers, process engineers, design engineers, and professionals involved in advanced semiconductor packaging.
Prerequisites
Basic understanding of semiconductor packaging and assembly processes is recommended.